Sony introduced world’s first 21.2MP 3-layer stacked CMOS sensor with DRAM for smartphones. This is industry’s first 3-layer stacked CMOS image sensor. It is specially made for smartphones. This CMOS sensor has a DRAM layer added to the conventional 2-layer stacked CMOS image sensor. This is also equipped with a layer of back-illuminated structure pixels.
There is a chip affixed with mounted circuits for signal processing. With this, you can have fast data readout speeds, capture still images of fast-moving subjects, super slow motion movies at up to 1,000 frames per second in full HD (1920×1080 pixels) etc. Sony 3-layer stacked configuration with DRAM full Specifications are here.
World’s first 21.2MP 3-layer stacked CMOS sensor features Effective pixel count of 5520 (H) x 3840 (V) 21.2 megapixels. There is 7.73mm (Type 1/2.3) Image size (Diagonal), 1.22μm (H) x 1.22μm (V) Unit cell size and you will get 30fps 4:3 19.3 megapixels / 16:9 17.1 megapixels Frame rate Still images.
This 21.2MP 3-layer stacked CMOS sensor supports Movies at 4K (3840 x 2160) at 60fps, Full HD / 720p at 240fps. There is 8.478 ms (4:3 19.3 megapixels) / 6.962 ms (16:9 17.1 megapixels) Reading speed too. You can use a 2.5V / 1.8V / 1.1V Power supply. Other supports includes Bayer RAW Image format, 1G bit DRAM capacity etc. The MIPI (CSI2) D-PHY 2.2Gbps/lane / C-PHY 2.0Gsps/lane is Output for this sensor.